We are in need of Engineers who would like to Explore the World of cutting edge Technologies in the Areas of DE/DFT/PD with desirable skillsets as below.
DV – Design Verification
- Experience : 3+ years in IP/SoC Level Verification
- Languages: Verilog, System Verilog, C, Assembly.
- Methodology: UVM (preferred), OVM, VMM.
- IP Protocols: PCIE, DDR, USB, Ethernet, HDMI,MIPI etc.
- Scripting : Perl/TCL/PYTHON
- Good understanding on Processor/DSP/GLS verification
DFT – Design for Testability
- Experience : 2+ years in DFT
- Scan insertion
- LBIST, MBIST
- ATPG using Fastscan/TestKompress /DFTCompiler/DFTMax/DFTAdvisor/TetraMaxPattern
- Simulation with/without timing annotation & debugging
PD – Physical Design
- Experience: 2+ years in PD
- Good Expertise in Floor planning, P&R, Extraction, IR Drop Analysis, Static Timing and Signal Integrity.
- Should have worked on any of advance Technology: 28nm, 40nm, 45nm, 65nm.
- Expertise in cadence or Synopsys tool (Encounter, ICC, PT/PTSI, TEMPUS, DC, RC, VOLTAS)